Altera DisplayPort MegaCore Function - Manual (Page 173)

DPRX_MST_VCPTAB7
VC Payload ID Table
Address: 0×00a9
Direction: RW
Reset: 0×00000000
Table 10-41: DPRX_MST_VCPTAB7 Bits
Bit Bit Name Function
31:28
VCPSLOT63 VC payload ID or slot 63
27:24
VCPSLOT62 VC payload ID or slot 62
23:20
VCPSLOT61 VC payload ID or slot 61
19:16
VCPSLOT60 VC payload ID or slot 60
15:12
VCPSLOT59 VC payload ID or slot 59
11:8
VCPSLOT58 VC payload ID or slot 58
7:4
VCPSLOT57 VC payload ID or slot 57
3:0
VCPSLOT56 VC payload ID or slot 56
Sink AUX Controller Interface
The following sections describe the registers for the AUX Controller interface.
DPRX_AUX_CONTROL
For transaction requests:
1. Wait for
MSG_READY
(in register
DPRX_AUX_STATUS
) to be 1, or enable the interrupt with
AUX_IRQ_EN
and wait for the interrupt request.
2. Read the transaction request total length from
LENGTH
.
3. Read the transaction request command from
DPRX_AUX_COMMAND
., which clears
MSG_READY
and
LENGTH
.
4. Read the transaction request data payload from registers
DPRX_AUX_BYTE0
to
DPRX_AUX_BYTE15
(read
LENGTH
- 1 bytes).
For transaction replies:
1. Wait for
READY_TO_TX
(in register
DPRX_AUX_STATUS
) to be 1. Implement a timeout.
2. Write registers
DPRX_AUX_COMMAND
to
DPRX_AUX_BYTE18
with transaction command and data payload.
3. Write
LENGTH
with the transaction total message length (1 to 17, 1 for the command plus 1 to 16 for
the data payload) and set
TX_STROBE
to 1. This sequence starts the reply transmission.
10-22 DPRX_MST_VCPTAB7
UG-01131
2015.05.04
Altera Corporation DisplayPort Sink Register Map and DPCD Locations
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