Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP - Manual (Page 9)

Chapter 1: About This IP 1–3
Features
June 2011 Altera Corporation External Memory Interface Handbook Volume 3
Section I. DDR and DDR2 SDRAM Controllers with ALTMEMPHY IP User Guide
Table 1–2 shows the level of support offered by the DDR and DDR2 SDRAM
Controllers with ALTMEMPHY IP to each of the Altera device families.
Features
The ALTMEMPHY megafunction offers the following features:
■ Simple setup.
■ Support for the Altera PHY Interface (AFI) for DDR and DDR2 SDRAM on all
supported devices.
■ Automated initial calibration eliminating complicated read data timing
calculations.
■ Voltage and temperature (VT) tracking that guarantees maximum stable
performance for DDR and DDR2 SDRAM interfaces.
■ Self-contained datapath that makes connection to an Altera controller or a
third-party controller independent of the critical timing paths.
■ Full-rate and half-rate DDR and DDR2 SDRAM interfaces.
■ Easy-to-use parameter editor.
In addition, Table 1–3 shows the features provided by the DDR and DDR2 SDRAM
HPC II.
Table 1–2. Device Family Support
Device Family Support
Arria
®
GX Final
Arria II GX Final
Cyclone ® III Final
Cyclone III LS Final
Cyclone IV E Final
Cyclone IV GX Final
HardCopy II HardCopy Companion
Stratix
®
II Final
Stratix II GX Final
Other device families No support
Table 1–3. DDR and DDR2 SDRAM HPC and HPC II Features (Part 1 of 2)
Features HPC II
Half-rate controller v
Support for AFI ALTMEMPHY v
Support for Avalon ® Memory Mapped (MM) local interface v
Configurable command look-ahead bank management with in-order reads
and writes
v
Additive latency v (1)
Support for arbitrary Avalon burst length v