Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP - Manual (Page 134)

8–
6
Ch
apt
er
8:
T
imin
g
Diagr
a
ms
D
D
R
an
d DDR
2 Hi
gh
-P
erfo
rmance Controllers
II
Ex
ternal Memory
Interfac
e H
andbook
Volu
me 3
Jun
e
2
011
Al
tera Cor
por
atio
n
Secti
o
n
I.
D
DR an
d DDR
2 SDR
A
M Co
ntr
o
lle
rs with ALTMEMPH
Y IP
User G
u
ide
Full-Rate Read
Figure 8–3. Full-Rate Read Operation for HPC II
phy_clk
local_address[23:0]
local_size[2:0]
local_ready
local_burstbegin
local_read_req
local_rdata_valid
local_rdata[15:0]
local_be[1:0]
afi_addr[12:0]
afi_ba[1:0]
afi_cs_n
AFI Command[2:0]
afi_dm[1:0]
afi_dqs_burst
afi_doing_rd
afi_rdata[15:0]
afi_rdata_valid
mem_cke
mem_clk
mem_ba[1:0]
mem_addr[12:0]
mem_cs_n
Mem Command[2:0]
mem_dqs
mem_dm
mem_dq[7:0]
mem_odt
000000 000000 000002
2
FFFF FFFF ABCD EF01 ABCD EF01
3
0000
0
NOP NOP NOP
NOP NOP NOP
RD RD
RD RD
000000 000004
3
FFFF FFFF ABCD EF01 ABCD EF01
0
0000 0000 0004
00 00 00 CD AB 01 EF CD AB 01 EF
AFI Memory Interface
Local Interface
Controller - AFI
[1] [2] [3] [6]
[4] [5]