Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP - Manual (Page 21)

Chapter 2: Getting Started 2–7
HardCopy Guidelines
June 2011 Altera Corporation External Memory Interface Handbook Volume 3
Section I. DDR and DDR2 SDRAM Controllers with ALTMEMPHY IP User Guide
c Use the simulation models only for simulation and not for synthesis or any
other purposes. Using these models for synthesis creates a nonfunctional
design.
1 Some third-party synthesis tools can use a netlist that contains only the
structure of the MegaCore function, but not detailed logic, to optimize
performance of the design that contains the MegaCore function. If your
synthesis tool supports this feature, turn on Generate netlist.
When targeting a VHDL simulation model, the MegaWizard Plug-In
Manager still generates the <variation_name>_alt_mem_phy.v file for the
Quartus II synthesis. Do not use this file for simulation. Use the
<variation_name>.vho file for simulation instead.
The ALTMEMPHY megafunction only supports functional simulation. You
cannot perform timing or gate-level simulation when using the
ALTMEMPHY megafunction.
5. On the Summary tab, select the files you want to generate. A gray checkmark
indicates a file that is automatically generated. All other files are optional.
6. Click Finish to generate the MegaCore function and supporting files. A generation
report appears.
7. If you generate the MegaCore function instance in a Quartus II project, you are
prompted to add the .qip files to the current Quartus II project. When prompted to
add the .qip files to your project, click Yes. The addition of the .qip files enables
their visibility to Nativelink. Nativelink requires the .qip files to include libraries
for simulation.
1 The .qip file is generated by the parameter editor and contains information
about the generated IP core. In most cases, the .qip file contains all of the
necessary assignments and information required to process the MegaCore
function or system in the Quartus II compiler. The parameter editor
generates a single .qip file for each MegaCore function.
8. After you review the generation report, click Exit to close the MegaWizard Plug-In
Manager.
9. For the high-performance controller (HPC or HPC II), set the <variation
name>_example_top.v or .vhd file to be the project top-level design file.
a. On the File menu, click Open.
b. Browse to <variation name>_example_top and click Open.
c. On the Project menu, click Set as Top-Level Entity.
HardCopy Guidelines
For information about targeting a HardCopy device, refer to “HardCopy Migration
Design Guidelines” in Volume 3, Section VI of the External Memory Interface Handbook.