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Address and command decoding logic, Low-power logic, User-controlled self-refresh – Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP User Manual

Page 99: Automatic power-down with programmable time-out, Odt generation logic, Odt generation logic –5, Refer to, Automatic power-down with

Address and command decoding logic, Low-power logic, User-controlled self-refresh | Automatic power-down with programmable time-out, Odt generation logic, Odt generation logic –5, Refer to, Automatic power-down with | Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP User Manual | Page 99 / 140 Address and command decoding logic, Low-power logic, User-controlled self-refresh | Automatic power-down with programmable time-out, Odt generation logic, Odt generation logic –5, Refer to, Automatic power-down with | Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP User Manual | Page 99 / 140
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