Rockwell Automation 20D PowerFlex 700S Drive Ph I Control, Frames 1...11 - Manual (Page 198)

B-6 Control Block Diagrams
See Point-to-Point
Position Control Diagram page 7
PositRef EGR Mul PositRef EGR Div
XReg Integ Out
Position Status
XReg Integ LoLim XReg Integ HiLim
Position Status
CoarsePosit Trgt
Position Control
(Interp Rev)
Interp Speed
Interp Position
Aux Posit Ref
Posit Offset 1 Posit Offset 2
Posit Offset Spd
X Offst SpdFilt
Position Control
(X Offset Pol)
Position Control
(X Offset Ref)
PositRef EGR Out
Position Cmmd
Position Control (2ms)
Interpolated/Direct
Mtr Posit Fdbk
Posit Load Fdbk
Posit FB EGR Mul Posit FB EGR Div
Position Control
(Integ En)
Position Control
(Integ Hold)
XReg Spd LoLim XReg Spd HiLim
*
*
*
Posit Ref Sel
Posit Spd Output
Position Error
from Speed/Posit
Fdbk [10H2]
to Speed Control - Regulator [3A2]
Logic Ctrl State
(position enable) [7F5]
Logic Ctrl State
(position enable) [7G5]
Interp Accel Rate
Xsync Status
Motn Posit Sync
Interpolator
x
x
x
740
13
748
Interp SyncInput
0 1 2
751
749 743
742
Gear Rat
[ N ] [ D ]
745 746
+
Rate Lim
753 754 755
LPass
Filter
756
740
04
740
05
Accum
744
+
747
762 764
P Gain
kp
768
I Gain
ki s
770
Limit
772 773
741
00
774
+
Gear Rat
[ N ] [ D ]
766 767
Link
763 765
Calib Const
Calib Const
Droop
771
Inv
&
740
02
740
03
Limit
1 0
318
775 776
741
02
Act Motor Posit Posit Actl Load
PositReg Integ
PositReg Droop
PositReg P Gain
741
01
741
03
769
Deriv Deriv
Deriv
Accum
Accum Accum
Accum Accum
Logic Ctrl State
(Position En)
*
157
03
0
(X Spd LLim) (X Spd HLim)
+
-
+
-
+ -
&
740
01
157
03
Output Enable
Deriv
157
03
1 2 3 4 5 6
B
A
D
C
F
E
H
G
I
Position Control ActPosit Rst
*
Position Control Xzero Preset
740
06
740
08
On the rising edge (activation) of p741 bit 7 [8G5] the following bit assignments occur: If p 740 bit 8 is set, then p763, p765, p744, and p747 get loaded with [Mtr Posit Fdbk (p762) - Abs Posit Offset (p757)]. Also, p722 (test point 7) gets loaded with [ - Abs Posit Offset (p757)]. If p 740 bit 8 is reset and p740 bit 6 is set, then p763, p765, p744, and p747 get loaded with Mtr Posit Fdbk (p762). Also, p722 (tp 7) gets loaded with the value 0. If p 740 bit 8 is reset and p740 bit 6 is reset, then p763, p765, p744, and p747 get loaded with the reference value (prior to reference derivative function [6D2]). Also, p722 (tp 7) gets loaded with (p763 - p762). This is the only combination for motion control.
CoarseSpd Trgt
750
752
786
00
p786 bit 0 or p919 must be linked to p1003 for proper
Interpolator operation.
0
155
06
Logic Status
1
919
00
1003
00
∑
∑
∑
∑ ∑
∑
∆ ∆
∆
6