Rainbow Electronics DS3134 - Manual (Page 93)

DS3134
93 of 203
Bits 0 to 9 / Starting Block Pointer (TSBP0 to TSBP9). These 10 bits determine which of the 1024
blocks within the transmit FIFO, the host wants the device to configure as the starting block for a
particular HDLC channel. Any of the blocks within a chain of blocks for a HDLC channel can be
configured as the starting block. When these 10 bits are read, they will report the current Block Pointer
being used to read data from the Transmit FIFO by the HDLC Layer 2 engines.
0000000000 (000h) = Use Block 0 as the Starting Block
0111111111 (1FFh) = Use Block 511 as the Starting Block
1111111111 (3FFh) = Use Block 1023 as the Starting Block
Register Name: TFBPIS
Register Description: Transmit FIFO Block Pointer Indirect Select
Register Address:
0990h
7 6 5 4 3 2 1 0
BLKID7 BLKID6 BLKID5 BLKID4 BLKID3 BLKID2 BLKID1 BLKID0
15 14 13 12 11 10 9 8
IAB IARW n/a n/a n/a n/a BLKID9 BLKID8
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bits 0 to 9 / Block ID (BLKID0 to BLKID9).
0000000000 (000h) = Block Number 0
0111111111 (1FFh) = Block Number 511
1111111111 (3FFh) = Block Number 1023
Bit 14 / Indirect Access Read/Write (IARW). When the host wishes to read data from the internal
Transmit Block Pointer RAM, this bit should be written to a one by the host. This causes the device to
begin obtaining the data from the block location indicated by the BLKID bits. During the read access, the
IAB bit will be set to one. Once the data is ready to be read from the TFBP register, the IAB bit will be
set to zero. When the host wishes to write data to the internal Transmit Block Pointer RAM, this bit
should be written to a zero by the host. This causes the device to take the data that is currently present in
the TFBP register and write it to the channel location indicated by the BLKID bits. When the device has
completed the write, the IAB will be set to zero.
Bit 15 / Indirect Access Busy (IAB). When an indirect read or write access is in progress, this read only
bit will be set to a one. During a read operation, this bit will be set to a one until the data is ready to be
read. It will be set to zero when the data is ready to be read. During a write operation, this bit will be set
to a one while the write is taking place. It will be set to zero once the write operation has completed.