Rainbow Electronics DS3134 - Manual (Page 104)

DS3134
104 of 203
Receive Packet Descriptors Figure 8.1.2B
dword 0
Data Buffer Address (32)
dword 1
BUFS (3) Byte Count (13) Next Descriptor Pointer (16)
dword 2
Timestamp (24) HDLC Channel (8)
dword 3
unused (32)
Note: The organization of the Receive Descriptor is not affected by the enabling of Big Endian
dword 0; Bits 0 to 31 / Data Buffer Address. Direct 32-bit starting address of the data buffer that is
associated with this receive descriptor.
dword 1; Bits 0 to 15 / Next Descriptor Pointer. This 16-bit value is the offset from the Receive
Descriptor Base Address of the next descriptor in the chain. Only valid if Buffer Status = 001 or 010.
Note: This is an index, not absolute address.
dword 1; Bits 16 to 28 / Byte Count. Number of bytes stored in the data buffer. Maximum is 8191
bytes (0000h = 0 bytes / 1FFFh = 8191 bytes). This byte count does not include the buffer offset. The
Host will determine the buffer offset (if any) via the Buffer Offset field in the Receive DMA
Configuration RAM (see Section 8.1.5).
dword 1; Bits 29 to 31 / Buffer Status. Must be one of the three states listed below.
001 = first buffer of a multiple buffer packet
010 = middle buffer of a multiple buffer packet
100 = last buffer of a multiple or single buffer packet (equivalent to EOF)
dword 2; Bits 0 to 7 / HDLC Channel Number. HDLC channel number, which can be from 1 to 256.
00000000 (00h) = HDLC Channel Number 1
11111111 (FFh) = HDLC Channel Number 256
dword 2; Bits 8 to 31 / Timestamp. When each descriptor is written into memory by the DMA, this
24-bit timestamp is provided to keep track of packet arrival times. The timestamp is based on the PCLK
frequency divided by 16. For a 33 MHz PCLK, the timestamp will increment every 485 ns and will
rollover every 8.13 seconds. For a 25 MHz clock, the timestamp will increment every 640 ns and will
rollover every 10.7 seconds. The host can calculate the difference in arrival times of packets by knowing
the PCLK frequency and then taking the difference in timestamp readings between consecutive Packet
Descriptors.
dword 3; Bits 0 to 31 / Unused. Not written to by the DMA. Can be used by the host. Application
Note: dword 3 is used by the Transmit DMA and in store and forward applications, the Receive and
Transmit Packet Descriptors have been designed to eliminate the need for the Host to groom the
descriptors before transmission. In these types of applications, the Host should not use dword 3 of the
Receive Packet Descriptor.