Rainbow Electronics DS3134 User Manual
Page 92
DS3134
92 of 203
0000000010 (002h) = High Water Mark is 2 Blocks
0111111111 (1FFh) = High Water Mark is 511 Blocks
1111111111 (3FFh) = High Water Mark is 1023 Blocks
Register Name:
TFSBPIS
Register Description: Transmit FIFO Starting Block Pointer Indirect Select
Register Address:
0980h
7
6
5
4
3
2
1
0
HCID7
HCID6
HCID5
HCID4
HCID3
HCID2
HCID1
HCID0
15
14
13
12
11
10
9
8
IAB
IARW
n/a
n/a
n/a
n/a
n/a
n/a
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bits 0 to 7 / HDLC Channel ID (HCID0 to HCID7).
00000000 (00h) = HDLC Channel Number 1
11111111 (FFh) = HDLC Channel Number 256
Bit 14 / Indirect Access Read/Write (IARW). When the host wishes to write data to the internal
Transmit Starting Block Pointer RAM, this bit should be written to a zero by the host. This causes the
device to take the data that is currently present in the TFSBP register and write it to the channel location
indicated by the HCID bits. When the device has completed the write, the IAB will be set to zero.
Note: The TFSBP is a write only register. Once this register has been written to and operation started,
DS3134 internal state machine will change the value in this register.
Bit 15 / Indirect Access Busy (IAB). When an indirect read or write access is in progress, this read only
bit will be set to a one. During a read operation, this bit will be set to a one until the data is ready to be
read. It will be set to zero when the data is ready to be read. During a write operation, this bit will be set
to a one while the write is taking place. It will be set to zero once the write operation has completed.
Register Name:
TFSBP
Register Description: Transmit FIFO Starting Block Pointer
Register Address:
0984h
7
6
5
4
3
2
1
0
TSBP7
TSBP6
TSBP5
TSBP4
TSBP3
TSBP2
TSBP1
TSBP0
15
14
13
12
11
10
9
8
n/a
n/a
n/a
n/a
n/a
n/a
TSBP9
TSBP8
Note: Bits that are underlined are read only, all other bits are read-write.