Rainbow Electronics DS3134 - Manual (Page 47)

DS3134
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Register Name: ISV54
Register Description: Interrupt Mask Register for SV54
Register Address:
0034h
7 6 5 4 3 2 1 0
SLBP7 SLBP6 SLBP5 SLBP4 SLBP3 SLBP2 SLBP1 SLBP0
15 14 13 12 11 10 9 8
SLBP15 SLBP14 SLBP13 SLBP12 SLBP11 SLBP10 SLBP9 SLBP8
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bits 0 to 15 / Status Bit for Change of State in Receive V.54 Loopback Detector (SLBP0 to
SLBP15).
0 = interrupt masked
1 = interrupt unmasked
Register Name: SDMA
Register Description: Status Register for DMA
Register Address:
0028h
7 6 5 4 3 2 1 0
RLBRE RLBR ROVFL RLENC RABRT RCRCE n/a n/a
15 14 13 12 11 10 9 8
TDQWE TDQW TPQR TUDFL RDQWE RDQW RSBRE RSBR
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bit 2 / Status Bit for Receive HDLC CRC Error (RCRCE). This status bit will be set to a one if any
of the receive HDLC channels experiences a CRC check sum error. The RCRCE bit will be cleared when
read and will not be set again until another CRC check sum error has occurred. If enabled via the RCRCE
bit in the Interrupt Mask for SDMA (ISDMA), the setting of this bit will cause a hardware interrupt at the
PCI Bus via the PINTA* signal pin and also at the LINT* if the Local Bus is in the Configuration Mode.
Bit 3 / Status Bit for Receive HDLC Abort Detected (RABRT). This status bit will be set to a one if
any of the receive HDLC channels detects an abort. The RABRT bit will be cleared when read and will
not be set again until another abort has been detected. If enabled via the RABRT bit in the Interrupt Mask
for SDMA (ISDMA), the setting of this bit will cause a hardware interrupt at the PCI Bus via the PINTA*
signal pin and also at the LINT* if the Local Bus is in the Configuration Mode.
Bit 4 / Status Bit for Receive HDLC Length Check (RLENC). This status bit will be set to a one if
any of the HDLC channels:
- Exceeds the octet length count (if so enabled to check for octet length)
- Receives a HDLC packet that does not meet the minimum length criteria of either 4 or 6 bytes
- Experiences a non-integral number of octets in between opening and closing flags.
The RLENC bit will be cleared when read and will not be set again until another length violation has
occurred. If enabled via the RLENC bit in the Interrupt Mask for SDMA (ISDMA), the setting of this bit