Samsung S3C2440A - Manual (Page 510)

AC97 CONTROLLER S3C2440A RISC MICROPROCESSOR
24-8
AC97 CONTROLLER SPECIAL REGISTERS
AC97 GLOBAL CONTROL REGISTER (AC_GLBCTRL)
Register Address R/W Description Reset Value
AC_GLBCTRL 0x5B000000 R/W AC97 Global Control Register 0x000000
AC_GLBCTRL Bit Description Initial State
Reserved [31:23] 0x00
Codec Ready Interrupt
Enable
[22]
0 : Disable
1 : Enable
0
PCM Out Channel Underrun
Interrupt Enable
[21]
0 : Disable
1 : Enable (FIFO is empty)
0
PCM In Channel Overrun
Interrupt Enable
[20]
0 : Disable
1 : Enable (FIFO is full)
0
MIC In Channel Overrun
Interrupt Enable
[19]
0 : Disable
1 : Enable (FIFO is full)
0
PCM Out Channel
Threshold Interrupt Enable
[18]
0 : Disable
1 : Enable (FIFO is half empty)
0
PCM In Channel Threshold
Interrupt Enable
[17]
0 : Disable
1 : Enable (FIFO is half full)
0
MIC In Channel Threshold
Interrupt Enable
[16]
0 : Disable
1 : Enable (FIFO is half full)
0
Reserved [15:14] 00
PCM Out Channel Transfer
Mode
[13:12]
00 : Off
01 : PIO
10 : DMA
11 : Reserved
00
PCM In Channel Transfer
Mode
[11:10]
00 : Off
01 : PIO
10 : DMA
11 : Reserved
00
MIC In Channel Transfer
Mode
[9:8]
00 : Off
01 : PIO
10 : DMA
11 : Reserved
00
Reserved [7:4] 0000
Transfer Data Enable Using
AC-Link
[3]
0 : Disable
1 : Enable
0
AC-Link On [2]
0 : Off
1 : SYNC signal transfer to Codec
0
Warm Reset [1]
0 : Normal
1 : Wake up codec from power down
0
Cold Reset [0]
0 : Normal
1 : Reset Codec and Controller logic
0