Samsung S3C2440A User Manual
Page 499
S3C2440A RISC MICROPROCESSOR
CAMERA INTERFACE
23-21
RGB3 START ADDRESS REGISTER
Register Address
R/W
Description
Reset
Value
CIPRCLRSA3 0x4F000074 RW RGB
3
rd
frame start address for preview DMA
0
CIPRCLRSA3 Bit
Description
Initial
State
CIPRCLRSA3 [31:0]
RGB
3
rd
frame start address for preview DMA
0
RGB4 START ADDRESS REGISTER
Register Address
R/W
Description
Reset
Value
CIPRCLRSA4 0x4F000078 RW RGB
4
th
frame start address for preview DMA
0
CIPRCLRSA4 Bit
Description
Initial
State
CIPRCLRSA4 [31:0]
RGB
4
th
frame start address for preview DMA
0
PREVIEW TARGET FORMAT REGISTER
Register Address
R/W
Description
Reset
Value
CIPRTRGFMT
0x4F00007C
RW
Target image format of preview DMA
0
CIPRTRGFMT Bit
Description
Initial
State
TargetHsize_Pr
[28:16]
Horizontal pixel number of target image for preview DMA (even)
0
FlipMd_Pr [15:14]
Image mirror and rotation for preview DMA
00 = Normal
01 = X-axis mirror
10 = Y-axis mirror
11 = 180’ rotation
0
TargetVsize_Pr
[12:0]
Vertical pixel number of target image for preview DMA
0