Samsung S3C2440A - Manual (Page 491)

S3C2440A RISC MICROPROCESSOR CAMERA INTERFACE
23-13
Y3 START ADDRESS REGISTER
Register Address R/W Description Reset Value
CICOYSA3 0x4F000020 RW Y 3
rd
frame start address for codec DMA 0
CICOYSA3 Bit Description Initial State
CICOYSA3 [31:0] Y 3
rd
frame start address for codec DMA 0
Y4 START ADDRESS REGISTER
Register Address R/W Description Reset Value
CICOYSA4 0x4F000024 RW Y 4
th
frame start address for codec DMA 0
CICOYSA4 Bit Description Initial State
CICOYSA4 [31:0] Y 4
th
frame start address for codec DMA 0
CB1 START ADDRESS REGISTER
Register Address R/W Description Reset Value
CICOCBSA1 0x4F000028 RW Cb 1
st
frame start address for codec DMA 0
CICOCBSA1 Bit Description Initial State
CICOCBSA1 [31:0] Cb 1
st
frame start address for codec DMA 0
CB2 START ADDRESS REGISTER
Register Address R/W Description Reset Value
CICOCBSA2 0x4F00002C RW Cb 2
nd
frame start address for codec DMA 0
CICOCBSA2 Bit Description Initial State
CICOCBSA2 [31:0] Cb 2
nd
frame start address for codec DMA 0
CB3 START ADDRESS REGISTER
Register Address R/W Description Reset Value
CICOCBSA3 0x4F000030 RW Cb 3
rd
frame start address for codec DMA 0
CICOCBSA3 Bit Description Initial State
CICOCBSA3 [31:0] Cb 3
rd
frame start address for codec DMA 0