Samsung S3C2440A - Manual (Page 195)

NAND FLASH CONTROLLER S3C2440A RISC MICROPROCESSOR
6-10
NAND FLASH MEMORY CONFIGURATION
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
R/ B
WE
ALE
CLE
CE
RE
RnB
nFWE
ALE
CLE
nFCE
nFRE
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
Figure 6-1 A 8-bit NAND Flash Memory Interface
When you write the address, the same address is issued from data[7:0] and data[15:8]
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
R/ B
WE
ALE
CLE
CE
RE
Rn B
nFWE
ALE
CLE
nFCE
nFRE
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
R/ B
WE
ALE
CLE
CE
RE
Rn B
nFWE
ALE
CLE
nFCE
nFRE
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[10]
DATA[9]
DATA[8]
Figure 6-2 Two 8-bit NAND Flash Memory Interface
I/O15
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
R/ B
WE
ALE
CLE
CE
RE
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
Rn B
nFWE
ALE
CLE
nFCE
nFRE
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[10]
DATA[9]
DATA[8]
Figure 6-3 A 16-bit NAND Flash Memory Interface