Samsung S3C2440A - Manual (Page 186)

S3C2440A RISC MICROPROCESSOR NAND FLASH CONTROLLER
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NAND FLASH CONTORLLER
OVERVIEW
In recent times, NOR flash memory gets high in price while an SDRAM and a NAND flash memory is
comparatively economical , motivating some users to execute the boot code on a NAND flash and execute the
main code on an SDRAM.
S3C2440A boot code can be executed on an external NAND flash memory. In order to support NAND flash boot
loader, the S3C2440A is equipped with an internal SRAM buffer called ‘Steppingstone’. When booting, the first 4
KBytes of the NAND flash memory will be loaded into Steppingstone and the boot code loaded into Steppingstone
will be executed.
Generally, the boot code will copy NAND flash content to SDRAM. Using hardware ECC, the NAND flash data
validity will be checked. Upon the completion of the copy, the main program will be executed on the SDRAM.
FEATURES
1) Auto boot: The boot code is transferred into 4-kbytes Steppingstone during reset. After the transfer, the boot
code will be executed on the Steppingstone.
2) NAND Flash memory I/F: Support 256Words, 512Bytes, 1KWords and 2KBytes Page.
3) Software mode: User can directly access NAND flash memory, for example this feature can be used in
read/erase/program NAND flash memory.
4) Interface: 8 / 16-bit NAND flash memory interface bus.
5) Hardware ECC generation, detection and indication (Software correction).
6) SFR I/F: Support Little Endian Mode, Byte/half word/word access to Data and ECC Data register, and Word
access to other registers
7) SteppingStone I/F: Support Little/Big Endian, Byte/half word/word access.
8) The Steppingstone 4-KB internal SRAM buffer can be used for another purpose after NAND flash booting.