Samsung S3C2440A - Manual (Page 264)

I/O PORTS S3C2440A RISC MICROPROCESSOR
9-18
PORT G CONTROL REGISTERS(GPGCON, GPGDAT)
If GPG0 - GPG7 will be used for wake-up signals at Sleep mode, the ports will be set in interrupt mode.
Register Address R/W Description Reset Value
GPGCON 0x56000060 R/W Configures the pins of port G 0x0
GPGDAT 0x56000064 R/W The data register for port G Undef.
GPGUP 0x56000068 R/W pull-up disable register for port G 0xfc00
GPGCON Bit Description
GPG15* [31:30] 00 = Input 01 = Output
10 = EINT[23] 11 = Reserved
GPG14* [29:28] 00 = Input 01 = Output
10 = EINT[22] 11 = Reserved
GPG13* [27:26] 00 = Input 01 = Output
10 = EINT[21] 11 = Reserved
GPG12 [25:24] 00 = Input 01 = Output
10 = EINT[20] 11 = Reserved
GPG11 [23:22] 00 = Input 01 = Output
10 = EINT[19] 11 = TCLK[1]
GPG10 [21:20] 00 = Input 01 = Output
10 = EINT[18] 11 = nCTS1
GPG9 [19:18] 00 = Input 01 = Output
10 = EINT[17] 11 = nRTS1
GPG8 [17:16] 00 = Input 01 = Output
10 = EINT[16] 11 = Reserved
GPG7 [15:14] 00 = Input 01 = Output
10 = EINT[15] 11 = SPICLK1
GPG6 [13:12] 00 = Input 01 = Output
10 = EINT[14] 11 = SPIMOSI1
GPG5 [11:10] 00 = Input 01 = Output
10 = EINT[13] 11 = SPIMISO1
GPG4 [9:8] 00 = Input 01 = Output
10 = EINT[12] 11 = LCD_PWRDN
GPG3 [7:6] 00 = Input 01 = Output
10 = EINT[11] 11 = nSS1
GPG2 [5:4] 00 = Input 01 = Output
10 = EINT[10] 11 = nSS0
GPG1 [3:2] 00 = Input 01 = Output
10 = EINT[9] 11 = Reserved
GPG0 [1:0] 00 = Input 01 = Output
10 = EINT[8] 11 = Reserved
Note : GPG[15:13] must be selected as Input in NAND boot mode.