Rainbow Electronics ATmega3290P_V User Manual

Features

Table of contents

Document Outline

Features
Features (Continued)
Pin Configurations
- Disclaimer
Overview
- Block Diagram
- Comparison between ATmega329, ATmega3290, ATmega649 and ATmega6490
- Pin Descriptions
Resources
About Code Examples
AVR CPU Core
- Introduction
- Architectural Overview
- ALU - Arithmetic Logic Unit
- AVR Status Register
  - SREG - AVR Status Register
- General Purpose Register File
  - The X-register, Y-register, and Z-register
- Stack Pointer
- Instruction Execution Timing
- Reset and Interrupt Handling
  - Interrupt Response Time
AVR ATmega329/3290/649/6490 Memories
- In-System Reprogrammable Flash Program Memory
- SRAM Data Memory
  - Data Memory Access Times
- EEPROM Data Memory
- I/O Memory
System Clock and Clock Options
- Clock Systems and their Distribution
- Clock Sources
- Default Clock Source
- Crystal Oscillator
- Low-frequency Crystal Oscillator
- Calibrated Internal RC Oscillator
  - OSCCAL - Oscillator Calibration Register
- External Clock
- Clock Output Buffer
- Timer/Counter Oscillator
- System Clock Prescaler
  - CLKPR - Clock Prescale Register
  - Switching Time
Power Management and Sleep Modes
- Idle Mode
- ADC Noise Reduction Mode
- Power-down Mode
- Power-save Mode
- Standby Mode
- Power Reduction Register
- Minimizing Power Consumption
- Register Description
  - SMCR - Sleep Mode Control Register
  - PRR - Power Reduction Register
System Control and Reset
- Resetting the AVR
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCUSR - MCU Status Register
- Internal Voltage Reference
  - Voltage Reference Enable Signals and Start-up Time
- Watchdog Timer
  - WDTCR - Watchdog Timer Control Register
- Timed Sequences for Changing the Configuration of the Watchdog Timer
  - Safety Level 1
  - Safety Level 2
Interrupts
- Interrupt Vectors in ATmega329/3290/649/6490
  - Moving Interrupts Between Application and Boot Space
  - MCUCR - MCU Control Register
External Interrupts
- Pin Change Interrupt Timing
I/O-Ports
- Introduction
- Ports as General Digital I/O
- Alternate Port Functions
- Register Description for I/O-Ports
8-bit Timer/Counter0 with PWM
- Overview
  - Registers
  - Definitions
- Timer/Counter Clock Sources
- Counter Unit
- Output Compare Unit
- Compare Match Output Unit
  - Compare Output Mode and Waveform Generation
- Modes of Operation
- Timer/Counter Timing Diagrams
- 8-bit Timer/Counter Register Description
Timer/Counter0 and Timer/Counter1 Prescalers
- Internal Clock Source
- Prescaler Reset
- External Clock Source
- GTCCR - General Timer/Counter Control Register
16-bit Timer/Counter1
- Overview
- Accessing 16-bit Registers
  - Reusing the Temporary High Byte Register
- Timer/Counter Clock Sources
- Counter Unit
- Input Capture Unit
- Output Compare Units
- Compare Match Output Unit
  - Compare Output Mode and Waveform Generation
- Modes of Operation
- Timer/Counter Timing Diagrams
- 16-bit Timer/Counter Register Description
8-bit Timer/Counter2 with PWM and Asynchronous Operation
- Overview
  - Registers
  - Definitions
- Timer/Counter Clock Sources
- Counter Unit
- Output Compare Unit
- Compare Match Output Unit
  - Compare Output Mode and Waveform Generation
- Modes of Operation
- Timer/Counter Timing Diagrams
- 8-bit Timer/Counter Register Description
- Asynchronous operation of the Timer/Counter
- Timer/Counter Prescaler
  - GTCCR - General Timer/Counter Control Register
SPI - Serial Peripheral Interface
- Overview
- SS Pin Functionality
- Data Modes
USART0
- Overview
  - AVR USART vs. AVR UART - Compatibility
- Clock Generation
- Frame Formats
  - Parity Bit Calculation
- USART Initialization
- Data Transmission - The USART Transmitter
- Data Reception - The USART Receiver
- Asynchronous Data Reception
- Multi-processor Communication Mode
  - Using MPCM
- USART Register Description
- Examples of Baud Rate Setting
USI - Universal Serial Interface
- Overview
- Functional Descriptions
- Alternative USI Usage
- USI Register Descriptions
Analog Comparator
- Overview
  - ADCSRB - ADC Control and Status Register B
  - ACSR - Analog Comparator Control and Status Register
- Analog Comparator Multiplexed Input
  - DIDR1 - Digital Input Disable Register 1
Analog to Digital Converter
- Features
- Operation
- Starting a Conversion
- Prescaling and Conversion Timing
- Changing Channel or Reference Selection
  - ADC Input Channels
  - ADC Voltage Reference
- ADC Noise Canceler
- ADC Conversion Result
LCD Controller
- Features
- Overview
- Mode of Operation
- LCD Usage
JTAG Interface and On-chip Debug System
- Features
- Overview
- Test Access Port - TAP
- TAP Controller
- Using the Boundary- scan Chain
- Using the On-chip Debug System
- On-chip Debug Specific JTAG Instructions
- On-chip Debug Related Register in I/O Memory
  - OCDR - On-chip Debug Register
- Using the JTAG Programming Capabilities
- Bibliography
IEEE 1149.1 (JTAG) Boundary-scan
- Features
- System Overview
- Data Registers
- Boundary-scan Specific JTAG Instructions
- Boundary-scan Related Register in I/O Memory
  - MCUCR - MCU Control Register
  - MCUSR - MCU Status Register
- Boundary-scan Chain
- ATmega329/3290/649/6490 Boundary-scan Order
- Boundary-scan Description Language Files
Boot Loader Support - Read-While-Write Self-Programming
- Boot Loader Features
- Application and Boot Loader Flash Sections
  - Application Section
  - BLS - Boot Loader Section
- Read-While-Write and No Read-While-Write Flash Sections
  - RWW - Read-While-Write Section
  - NRWW - No Read-While-Write Section
- Boot Loader Lock Bits
- Entering the Boot Loader Program
  - SPMCSR - Store Program Memory Control and Status Register
- Addressing the Flash During Self- Programming
- Self-Programming the Flash
Memory Programming
- Program And Data Memory Lock Bits
- Fuse Bits
  - Latching of Fuses
- Signature Bytes
- Calibration Byte
- Parallel Programming Parameters, Pin Mapping, and Commands
  - Signal Names
- Parallel Programming
- Serial Downloading
- Programming via the JTAG Interface
Electrical Characteristics
- Absolute Maximum Ratings*
- DC Characteristics
- External Clock Drive Waveforms
- External Clock Drive
- Maximum Speed vs. VCC
- SPI Timing Characteristics
- ADC Characteristics - Preliminary Data
- LCD Controller Characteristics - Preliminary Data - TBD
- Calibrated Internal RC Oscillator Accuracy
ATmega329/3290/649/6490 Typical Characteristics - Preliminary Data
- Active Supply Current
- Idle Supply Current
- Supply Current of I/O modules
  - Example
- Power-down Supply Current
- Power-save Supply Current
- Standby Supply Current
- Pin Pull-up
- Pin Driver Strength
- Pin Thresholds and hysteresis
- BOD Thresholds and Analog Comparator Offset
- Internal Oscillator Speed
- Current Consumption of Peripheral Units
- Current Consumption in Reset and Reset Pulsewidth
Register Summary
Instruction Set Summary
Ordering Information
- ATmega329
- ATmega3290
- ATmega649
- ATmega6490
Packaging Information
- 64A
- 64M1
- 100A
Errata
- ATmega329 rev. C
- ATmega329 rev. B
- ATmega329 rev. A
- ATmega3290 rev. C
- ATmega3290 rev. B
- ATmega3290 rev. A
- ATmega649 rev. A
- ATmega6490 rev. A
Datasheet Revision History
- Rev. 2552H - 11/06
- Rev. 2552G - 07/06
- Rev. 2552F - 06/06
- Rev. 2552E - 04/06
- Rev. 2552D - 03/06
- Rev. 2552C - 03/06
- Rev. 2552B - 05/05
- Rev. 2552A -11/04
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