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Bit timer/counter0 with pwm, Overview, Registers – Rainbow Electronics ATmega3290P_V User Manual

Page 89

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89

ATmega329/3290/649/6490

2552H–AVR–11/06

8-bit Timer/Counter0
with PWM

Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module.
The main features are:

Single Compare Unit Counter

Clear Timer on Compare Match (Auto Reload)

Glitch-free, Phase Correct Pulse Width Modulator (PWM)

Frequency Generator

External Event Counter

10-bit Clock Prescaler

Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)

Overview

A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 28. For the
actual placement of I/O pins, refer to “Pinout ATmega3290/6490” on page 2 and “Pinout
ATmega329/649” on page 3
. CPU accessible I/O Registers, including I/O bits and I/O
pins, are shown in bold. The device-specific I/O Register and bit locations are listed in
the “8-bit Timer/Counter Register Description” on page 99.

Figure 28. 8-bit Timer/Counter Block Diagram

Registers

The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers.
Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer
Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.

The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the T0 pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the Clock Select logic is
referred to as the timer clock (clk

T0

).

The double buffered Output Compare Register (OCR0A) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Wave-
form Generator to generate a PWM or variable frequency output on the Output Compare
pin (OC0A). See “Output Compare Unit” on page 91. for details. The compare match

Timer/Counter

D

ATA

B

U

S

=

TCNTn

Waveform

Generation

OCn

= 0

Control Logic

=

0xFF

BOTTOM

count

clear

direction

TOVn
(Int.Req.)

OCRn

TCCRn

Clock Select

Tn

Edge

Detector

( From Prescaler )

clk

Tn

TOP

OCn
(Int.Req.)