Rainbow Electronics ATmega3290P_V User Manual
Page 70
70
ATmega329/3210/649/6410
2552H–AVR–11/06
• SS/PCINT8 – Port B, Bit 0
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured
as an input regardless of the setting of DDB0. As a Slave, the SPI is activated when this
pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is
controlled by DDB0. When the pin is forced to be an input, the pull-up can still be con-
trolled by the PORTB0 bit
PCINT8, Pin Change Interrupt Source 8: The PB0 pin can serve as an external interrupt
source.
Table 31 and Table 32 relate the alternate functions of Port B to the overriding signals
shown in Figure 27 on page 65. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute
the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE
INPUT.
Table 31. Overriding Signals for Alternate Functions in PB7:PB4
Signal
Name
PB7/OC2A/
PCINT15
PB6/OC1B/
PCINT14
PB5/OC1A/
PCINT13
PB4/OC0A/
PCINT12
PUOE
0
0
0
0
PUOV
0
0
0
0
DDOE
0
0
0
0
DDOV
0
0
0
0
PVOE
OC2A ENABLE
OC1B ENABLE
OC1A ENABLE
OC0A ENABLE
PVOV
OC2A
OC1B
OC1A
OC0A
PTOE
–
–
–
–
DIEOE
PCINT15 •
PCIE1
PCINT14 •
PCIE1
PCINT13 •
PCIE1
PCINT12 •
PCIE1
DIEOV
1
1
1
1
DI
PCINT15 INPUT
PCINT14 INPUT
PCINT13 INPUT
PCINT12 INPUT
AIO
–
–
–
–