Rainbow Electronics ATmega3290P_V User Manual
Page 372
iv
ATmega329/3290/649/6490
2552H–AVR–11/06
Starting a Conversion ....................................................................................... 205
Prescaling and Conversion Timing ................................................................... 206
Changing Channel or Reference Selection ...................................................... 208
ADC Noise Canceler......................................................................................... 209
ADC Conversion Result.................................................................................... 213
LCD Controller ................................................................................. 220
Features............................................................................................................ 220
Overview........................................................................................................... 220
Mode of Operation ............................................................................................ 223
LCD Usage ....................................................................................................... 226
JTAG Interface and On-chip Debug System ................................. 236
Overview........................................................................................................... 236
Test Access Port – TAP.................................................................................... 236
TAP Controller .................................................................................................. 238
Using the Boundary-scan Chain ....................................................................... 239
Using the On-chip Debug System .................................................................... 239
On-chip Debug Specific JTAG Instructions ...................................................... 240
On-chip Debug Related Register in I/O Memory .............................................. 241
Using the JTAG Programming Capabilities ...................................................... 241
Bibliography ...................................................................................................... 241
IEEE 1149.1 (JTAG) Boundary-scan .............................................. 242
Features............................................................................................................ 242
System Overview.............................................................................................. 242
Data Registers .................................................................................................. 242
Boundary-scan Specific JTAG Instructions ...................................................... 244
Boundary-scan Related Register in I/O Memory .............................................. 245
Boundary-scan Chain ....................................................................................... 246
ATmega329/3290/649/6490 Boundary-scan Order.......................................... 255
Boundary-scan Description Language Files ..................................................... 267
Boot Loader Support – Read-While-Write Self-Programming ..... 268
Boot Loader Features ....................................................................................... 268
Application and Boot Loader Flash Sections .................................................... 268
Read-While-Write and No Read-While-Write Flash Sections........................... 268
Boot Loader Lock Bits....................................................................................... 270
Entering the Boot Loader Program ................................................................... 271
Addressing the Flash During Self-Programming .............................................. 273
Self-Programming the Flash ............................................................................. 274
Memory Programming..................................................................... 281
Program And Data Memory Lock Bits .............................................................. 281
Fuse Bits........................................................................................................... 282
Signature Bytes ................................................................................................ 284