Oki B4100 - Manual (Page 451)

40055101TH Rev.4
451 /
Figure A3.7.2 Block Diagram of WN5
AR 1 , AR 2
arresters
TEL1
TEL2
LINE
1
DB1 IC5 IC7
DP
DC
circuit
B
RL3
4
3
SW S3
H
MUTE
0
9
CML
7
8
SR
I SW
S1 - 3~6
Ring Detector
C31 R590
C11
T1
E
Impedance
matching
NT
5
G
CN15 ~
CN45
Receiving
sensitivity
Adj
RL6
A
R
RP
S
RI
OH2
SW
S4
J
IC
1
D
IC
2
F
F
RL
7 K
S1.1~2
Q3
C
to Modem
OH3
6
MUTE
OFF-HOOK
Detector
TEL CN1
CN2
(2/2)
CN2
(1/2)
2
Loop
Current
Detection