Rainbow Electronics W90N740 - Manual (Page 40)

W90N740
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7.3.2.1 SDRAM Components Supported
• 16M bit SDRAM
− 2Mx8 with 2 banks ；RA0 ~ RA10, CA0 ~ CA8
− 1Mx16 with 2 banks；RA0 ~ RA10, CA0 ~ CA7
• 64M bit SDRAM
− 8Mx8 with 4 banks；RA0 ~ RA11, CA0 ~ CA8
− 4Mx16 with 4 banks；RA0 ~ RA11, CA0 ~ CA7
− 2Mx32 with 4 banks ；RA0 ~ RA10, CA0 ~ CA7
• 128M bit SDRAM
− 16Mx8 with 4 banks；RA0 ~ RA11, CA0 ~ CA9
− 8Mx16 with 4 banks；RA0 ~ RA11, CA0 ~ CA8
− 4Mx32 with 4 banks；RA0 ~ RA11, CA0 ~ CA7
• 256M bit SDRAM
− 32Mx8 with 4 banks；RA0 ~ RA12, CA0 ~ CA9
− 16Mx16 with 4 banks；RA0 ~ RA12, CA0 ~ CA8
7.3.2.2 AHB Bus Address Mapping to SDRAM Bus
Note: * indicates the signal is not used; ** indicates the signal is fixed at logic 0 and is not used;
The HADDR prefixes have been omitted on the following tables.
A14 ~ A0 are the Address pins of the W90N740 EBI interface;
A14 and A13 are the Bank Selected Signal of SDRAM.