Rainbow Electronics W90N740 - Manual (Page 107)

W90N740
Publication Release Date: November 26, 2004
- 103 - Revision A4
This field will be set if there is no error during NATA do the NAT processing. If the status and EnNATOK
in MIEN are both set, the EMC_RxINT will be triggered.
RxBErr [11]: Receive Bus Error interrupt
Default value: 0
This field will be set if the access error from EMC to memory (for example, address undefined in system)
is occurred. If the status and EnBErr in MIEN are both set, the EMC_RxINT will be triggered. If the status
is set, the Rx operation will be ceased and software reset to reset the EMC is recommended.
RDU [10]: Receive Descriptor Unavailable interrupt
Default value: 0
This field will be set if the receive descriptors owned to the RxDMA is unavailable. If the status and
ENRDU in MIEN are both set, the EMC_RxINT will be triggered. When the status is set, the RxDMA
operation will be ceased till the user issues a write command to Receive Start Demand register to restart
Rx operation.
DENI [9]: DMA early notification interrupt
Default value: 0
If EnDEN is reset, an interrupt will be generated when the length field of the current frame is received.
DFOI [8]: DMA receive frame over maximum size interrupt
Default value: 0
If ENDFO is set, an interrupt will be generated when the received frame size is larger than the value
stored in RXMS.
MMP [7]: More Missed Packets than miss rolling over counter flag
Default value: 0
This bit is automatically set when the missed error counter rolls over.
RP [6]: Runt Packet
Default value: 0
This bits is set, it indicates that the received packet length is less than 64 bytes (unless ARP in MCMDR
is set).
ALIE [5]: Alignment Error
Default value: 0
This bit is set if the frame length in bits was not a multiple of eight.
RXGD [4]: Receive Good