Rainbow Electronics W90N740 User Manual
Page 138
W90N740
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Channel 0/1 Transfer Count Register (GDMA_TCNT0, GDMA_TCNT1)
Register Address
R/W
Description
Reset
Value
GDMA_TCNT0 0xFFF0.400C
R/W
Channel 0 Transfer Count Register
0x0000.0000
GDMA_TCNT1 0xFFF0.402C
R/W
Channel 1 Transfer Count Register
0x0000.0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
TFR_CNT [23:16]
15
14
13
12
11
10
9
8
TFR_CNT [15:8]
7
6
5
4
3
2
1
0
TFR_CNT [7:0]
TFR_CNT [23:0]: 24-bit Transfer Count
The TFR_CNT represents the required number of GDMA transfers. The maximum transfer count is
16M –1.
Channel 0/1 Current Source Register (GDMA_CSRC0, GDMA_CSRC1)
Register Address
R/W
Description
Reset
Value
GDMA_CSRC0 0xFFF0.4010
R
Channel 0 Current Source Address Register
0x0000.0000
GDMA_CSRC1 0xFFF0.4030
R
Channel 1 Current Source Address Register
0x0000.0000
31
30
29
28
27
26
25
24
CURRENT_SRC_ADDR [31:24]
23
22
21
20
19
18
17
16
CURRENT_SRC_ADDR [23:16]
15
14
13
12
11
10
9
8
CURRENT_SRC_ADDR [15:8]
7
6
5
4
3
2
1
0
CURRENT_SRC_ADDR [7:0]
CURRENT_SRC_ADDR [31:0]: 32-bit Current Source Address
The CURRENT_SRC_ADDR indicates the source address where the GDMA transfer is just occurring.
During a block transfer, the GDMA determines the successive source addresses by adding to or
subtracting from the source base address. Depending on the settings you make to the control register,
the current source address will remain the same or will be incremented or decremented.