Rainbow Electronics W90N740 - Manual (Page 147)

W90N740
Publication Release Date: November 26, 2004
- 143 - Revision A4
Host Controller Interrupt Disable Register (HcInterruptDisable)
Writing a ‘1’ to a bit in this register clears the corresponding bit, while writing a ‘0’ to a bit leaves the bit
nchanged.
Register Address R/W Description Reset Value
HcInterruptDisable 0xFFF0.5014 R/W Host Controller Interrupt Disable Register 0x0000.0000
Register: HcInterruptDisable
Bits Reset R/W Description
0 0b R/W
SchedulingOverrunEnable
0: Ignore
1: Disable interrupt generation due to Scheduling Overrun.
1 0b R/W
WritebackDoneHeadEnable
0: Ignore
1: Disable interrupt generation due to Write-back Done Head.
2 0b R/W
StartOfFrameEnable
0: Ignore
1: Disable interrupt generation due to Start of Frame.
3 0b R/W
ResumeDetectedEnable
0: Ignore
1: Disable interrupt generation due to Resume Detected.
4 0b R/W
UnrecoverableErrorEnable
This event is not implemented. All writes to this bit will be ignored.
5 0b R/W
FrameNumberOverflowEnable
0: Ignore
1: Disable interrupt generation due to Frame Number Overflow.
6 0b R/W
RootHubStatusChangeEnable
0: Ignore
1: Disable interrupt generation due to Root Hub Status Change.
29-7 0h - Reserved. Read/Write 0's
30 0b R/W
OwnershipChangeEnable
0: Ignore
1: Disable interrupt generation due to Ownership Change.
31 0b R/W
MasterInterruptEnable
Global interrupt disable. A write of ‘1’ disables all interrupts.