Kontron COMe Starterkit Eval T2 User Manual
Com express® carrier design guide, Rev. 2.0
Table of contents
Document Outline
- 1. Preface
- 2. COM Express Interfaces
- 2.1. COM Express Signals
- 2.2. PCIe General Introduction
- 2.3. General Purpose PCIe Lanes
- 2.3.1. General Purpose PCIe Signal Definitions
- 2.3.2. PCI Express Lane Configurations – Per COM Express Spec
- 2.3.3. PCI Express Lane Configurations – Module and Chipset Dependencies
- 2.3.4. Device Up / Device Down and PCIe Rx / Tx Coupling Capacitors
- 2.3.5. Schematic Examples
- 2.3.6. PCI Express Routing Considerations
- 2.4. PEG (PCI Express Graphics)
- 2.5. Digital Display Interfaces
- 2.6. Mobile PCI Express Module (MXM)
- 2.7. LAN
- 2.8. USB Ports
- 2.9. USB 3.0
- 2.10. SATA
- 2.11. LVDS
- 2.12. Embedded DisplayPort (eDP)
- 2.13. VGA
- 2.14. TV-Out
- 2.15. Digital Audio Interfaces
- 2.16. LPC Bus – Low Pin Count Interface
- 2.17. SPI – Serial Peripheral Interface Bus
- 2.18. General Purpose I2C Bus Interface
- 2.19. System Management Bus (SMBus)
- 2.20. General Purpose Serial Interface
- 2.21. CAN Interface
- 2.22. Miscellaneous Signals
- 2.22.1. Module Type Detection
- 2.22.2. Speaker Output
- 2.22.3. RTC Battery Implementation
- 2.22.4. Power Management Signals
- 2.22.5. Watchdog Timer
- 2.22.6. General Purpose Input/Output (GPIO)
- 2.22.7. SDIO Interface Multiplexed with GPIOs
- 2.22.8. Fan Connector
- 2.22.9. Thermal Interface
- 2.22.10. Protecting COM.0 Pins Reclaimed From the VCC_12V Pool
- 2.23. PCI Bus
- 2.24. IDE and CompactFlash (PATA)
- 3. Power and Reset
- 4. BIOS Considerations
- 5. COM Express Module Connectors
- 6. Carrier Board PCB Layout Guidelines
- 6.1. General
- 6.2. PCB Stack-ups
- 6.3. Trace-Impedance Considerations
- 6.4. Trace-Length Extensions Considerations
- 6.5. Routing Rules for High-Speed Differential Interfaces
- 6.5.1. PCI Express Trace Routing Guidelines
- 6.5.2. USB Trace Routing Guidelines
- 6.5.3. USB 3.0 Trace Routing Guidelines
- 6.5.4. PEG Trace Routing Guidelines
- 6.5.5. SDVO Trace Routing Guidelines
- 6.5.6. DisplayPort Trace Routing Guidelines
- 6.5.7. LAN Trace Routing Guidelines
- 6.5.8. Serial ATA Trace Routing Guidelines
- 6.5.9. LVDS Trace Routing Guidelines
- 6.6. Routing Rules for Single Ended Interfaces
- 7. Mechanical Considerations
- 8. Applicable Documents and Standards
- 9. Appendix A: Deprecated Features
- 10. Appendix B: Sourcecode for Port 80 Decoder
- 11. Appendix C: List of Tables
- 12. Appendix D: List of Figures
- 13. Appendix E: Revision History