Kontron COMe Starterkit Eval T2 - Manual (Page 144)

COM Express Interfaces
2.22.10. Protecting COM.0 Pins Reclaimed From the VCC_12V Pool
The COM.0 Rev. 2 Type 6 and Type 10 pin-out types introduce eight signals that are mapped to
pins that are re-claimed from pins that are VCC_12V supply pins on Type 1,2,3,4 and 5 Modules.
These signals include
 SER0_TX, SER1_TX TTL level outputs from the Module
 SER0_RX, SER1_RX TTL level inputs to the Module
 LID#, SLEEP# 3.3V logic level inputs to the Module, in the suspend domain
 FAN_TACHIN 3.3V logic level input to the Module
 FAN_PWMOUT 3.3V logic level output from the Module
A new Type strap pin is also introduced in COM.0 Rev 2, for all Module Types. It also falls on a
pin that was used exclusively for VCC_12V in COM.0 Rev. 1:
 TYPE10# VCC_12V on COM.0 Rev. 1 Module Types 1,2,3,4,5
No connect on COM.0 Rev. 2 Module Types 1,2,3,4,5,6
47K Module pull-down to GND on Module Type 10
All nine of the signals referenced above on COM.0 Rev. 2 compliant Module and Carrier designs
shall be able to withstand continuous direct connections to low impedance 12V sources (i.e. a
short to a 12V power supply).
One line of defense against such unintended connections is for Carrier designs to decode the
Module TYPE pins (3 pins on the C-D connector, and the new TYPE10# pin on the A-B
connector) and to not power the system up if an improper Module Type is detected. Examples of
this may be found in the PICMG Carrier Design Guide. However, there are some situations in
which this can not be relied upon. One such situation is if a user plugs a Type 10 Module into a
Rev. 1 Type 1 Carrier. Since the TYPE10# strap was not anticipated in the Rev. 1 Carrier, the
Carrier will apply power to the Type 10 Module. Thus it is very important that Type 10 and 6
Modules be able to withstand 12V exposure to the pins reclaimed from the VCC_12V pool.
2.22.10.1. Logic Level Signals on Pins Reclaimed from VCC_12V
Module logic level inputs and outputs that are implemented on pins reclaimed from the VCC_12V
pool shall implement the series Schottky diode protection shown in the right side of the figure
below. The Schottky diode should be a BAT54 device. For inputs in this group, a 47K pull-up to
the local 3.3V S0 or S5 rail (as appropriate) shall be used.
Carrier Board logic level inputs and outputs that are implemented on pins reclaimed from the
VCC_12V pool shall be protected against protracted accidental exposure to 12V. The protection
scheme shown in the left side of the Figure 5-13 below may be used. Any scheme that is used
shall be able to pull the reclaimed Module input low enough such that Module CMOS input logic
sees a maximum voltage of 0.5V for a logic low, as indicated in the figure.
PICMG ® COM Express ® Carrier Board Design Guide Rev. 2.0 / December 6, 2013
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