Kontron COMe Starterkit Eval T2 - Manual (Page 5)

2.21.1. Signal Definitions...........................................................................................................127
2.21.2. Reference Schematics..................................................................................................128
2.21.3. Routing Considerations.................................................................................................128
2.22. Miscellaneous Signals......................................................................................................129
2.22.1. Module Type Detection..................................................................................................130
2.22.2. Speaker Output..............................................................................................................130
2.22.3. RTC Battery Implementation.........................................................................................131
2.22.4. Power Management Signals..........................................................................................133
2.22.5. Watchdog Timer.............................................................................................................135
2.22.6. General Purpose Input/Output (GPIO)..........................................................................136
2.22.7. SDIO Interface Multiplexed with GPIOs........................................................................138
2.22.8. Fan Connector...............................................................................................................140
2.22.9. Thermal Interface...........................................................................................................141
2.22.10. Protecting COM.0 Pins Reclaimed From the VCC_12V Pool.......................................142
2.23. PCI Bus.............................................................................................................................. 145
2.23.1. Signal Definitions...........................................................................................................145
2.23.2. Reference Schematics..................................................................................................146
2.23.3. Routing Considerations.................................................................................................149
2.24. IDE and CompactFlash (PATA).........................................................................................151
2.24.1. Signal Definitions...........................................................................................................151
2.24.2. IDE 40-Pin Header (3.5 Inch Drives).............................................................................152
2.24.3. IDE 44-Pin Header (2.5 Inch and Low Profile Optical Drives).......................................152
2.24.4. CompactFlash 50 Pin Header.......................................................................................152
2.24.5. IDE / CompactFlash Reference Schematics.................................................................152
2.24.6. Routing Considerations.................................................................................................153
3. Power and Reset..............................................................................................................154
3.1. General Power requirements...........................................................................................154
3.1.1. VCC_12V Rise Time Caution and Inrush Currents.......................................................154
3.2. ATX and AT Style Power Control......................................................................................155
3.2.1. ATX vs AT Supplies........................................................................................................155
3.2.2. Power States..................................................................................................................155
3.2.3. ATX and AT Power Sequencing Diagrams....................................................................156
3.2.4. Power Monitoring Circuit Discussion.............................................................................159
3.2.5. Power Button.................................................................................................................160
3.3. Design Considerations for Carrier Boards containing FPGAs/CPLDs.........................161
3.4. Reference Schematics......................................................................................................162
3.4.1. ATX Power Supply.........................................................................................................162
3.5. Routing Considerations....................................................................................................165
3.5.1. VCC_12V and GND.......................................................................................................165
3.5.2. Copper Trace Sizing and Current Capacity...................................................................165
3.5.3. VCC5_SBY Routing.......................................................................................................166
3.5.4. Power State and Reset Signal Routing.........................................................................166
3.5.5. Slot Card Supply Decoupling Recommendations.........................................................167
4. BIOS Considerations.......................................................................................................168
4.1. Legacy versus Legacy-Free.............................................................................................168
PICMG ® COM Express ® Carrier Board Design Guide Rev. 2.0 / December 6, 2013
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