Kontron COMe Starterkit Eval T2 - Manual (Page 215)

Appendix D: List of Figures
12. Appendix D: List of Figures
Figure 1: Schematic Conventions......................................................................................................................15
Figure 2: COM Express Type 10 Connector Layout..........................................................................................17
Figure 3: COM Express Type 2 Connector Layout............................................................................................18
Figure 4: COM Express Type 6 Connector Layout............................................................................................19
Figure 5: PCIe Rx Coupling Capacitors.............................................................................................................33
Figure 6: PCIe Reference Clock Buffer.............................................................................................................35
Figure 7: PCI Express x1 Slot Example............................................................................................................37
Figure 8: PCI Express x4 Slot Example............................................................................................................38
Figure 9: PCI Express x1 Generic Device Down Example................................................................................39
Figure 10: PCI Express x4 Generic Device Down Example..............................................................................40
Figure 11: PCI Express Mini Full Sized Card Footprint.....................................................................................41
Figure 12: PCI Express Mini Card Connector...................................................................................................41
Figure 13: PCI Express Mini Card Connector on COM Express Carrier Board................................................42
Figure 14: PCIe Mini Card Reference Circuitry.................................................................................................44
Figure 17: PCI Express: ExpressCard Example................................................................................................46
Figure 18: x1, x4, x8, x16 Slot...........................................................................................................................52
Figure 19: PEG Lane Reversal Mode................................................................................................................54
Figure 20: DisplayPort Reference Schematics..................................................................................................56
Figure 21: HDMI Example..................................................................................................................................57
Figure 22: DVI Example.....................................................................................................................................59
Figure 23: SDVO to DVI Transmitter Example..................................................................................................63
Figure 24: MXM Reference Schematics............................................................................................................68
Figure 25: DisplayPort implementation of MXM interface (one channel)..........................................................69
Figure 26: Magnetics Integrated Into RJ-45 Receptacle...................................................................................73
Figure 27: Discrete Coupling Transformer.........................................................................................................74
Figure 28: USB Connector.................................................................................................................................77
Figure 29: USB Reference Design....................................................................................................................79
Figure 30: USB 3.0 Connector...........................................................................................................................83
Figure 31: USB 3.0 Example Schematic...........................................................................................................84
Figure 32: Avoiding Back-driving.......................................................................................................................86
Figure 33: SATA Connector Diagram.................................................................................................................89
Figure 34: LVDS Reference Schematic.............................................................................................................97
Figure 35: eDP Reference Schematic.............................................................................................................100
Figure 36: Female VGA Connector HDSUB15 for Carrier Board....................................................................101
Figure 37: VGA Reference Schematics...........................................................................................................102
Figure 38: Multiple Audio Codec Configuration...............................................................................................106
Figure 40: AC'97 Schematic Example.............................................................................................................108
Figure 41: Audio Amplifier................................................................................................................................109
Figure 42: LPC Reset Buffer Reference Circuitry............................................................................................112
Figure 43: LPC PLD Example – Port 80 Decoder Schematic.........................................................................113
Figure 44: LPC Super I/O Example.................................................................................................................115
Figure 45: LPC Serial Interfaces......................................................................................................................116
Figure 46: SPI Reference Schematics.............................................................................................................119
Figure 47: System Configuration EEPROM Circuitry......................................................................................122
PICMG ® COM Express ® Carrier Board Design Guide Rev. 2.0 / December 6, 2013
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