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Kontron COMe Starterkit Eval T2 User Manual

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Appendix B: Sourcecode for Port 80 Decoder

---------------------------------------------------------------------------
-- LPC state machine
-- LPC_State value is actually one clock cycle late.
---------------------------------------------------------------------------
P_LPC_StatMachine: process(lclk)

begin
if (lclk'event and lclk='1') then

-- Synchronous reset

if (lreset_n = '0') then

LPC_State <= IDLE;
W_Data(7 downto 0) <= "00000000"; -- init. both displays to all on
else

case LPC_State is

-- Looking for a START condition
when IDLE =>

if (lframe_nreg = '0') and (lad_rin = "0000") then

LPC_State <= START;

-- START condition detected

end if;

-- Skip extra cycles on START frame

-- (can be many clock cycles)

-- and then, check for I/O write transaction

when START =>

if (lframe_nreg = '0') then -- frame still asserted

if (lad_rin /= "0000") then
LPC_State <= IDLE; -- unsupported start code
end if;

else
if (lad_rin(3 downto 1) = "001") then

LPC_State <= WADDN3;

-- I/O write detected

else
LPC_State <= IDLE;

-- unsupported command

end if;

end if;

-- --------------------------------
-- I/O write transaction processing
-- --------------------------------
when WADDN3 => -- Write Data Address Nibble 3

-- Find next state
if (lframe_nreg = '0') or (lad_rin /= "0000") then

LPC_State <= IDLE; -

-- abort cycle, bad frame

-- or address mismatch

else

LPC_State <= WADDN2;

end if;

when WADDN2 =>

-- Write Data Address Nibble 2

-- Find next state
if (lframe_nreg = '0') or (lad_rin /= "0000") then

LPC_State <= IDLE; -- abort cycle, bad frame
-- or address mismatch

else

LPC_State <= WADDN1;

end if;

when WADDN1 =>

-- Write Data Address Nibble 1

-- Find next state
if (lframe_nreg = '0') or (lad_rin /= "1000") then

LPC_State <= IDLE; -- abort cycle, bad frame
-- or address mismatch

else

LPC_State <= WADDN0;

end if;

when WADDN0 =>

-- Write Data Address Nibble 0

-- Find next state
if (lframe_nreg = '0') or (lad_rin /= "0000") then

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