NEC PD78F9488 - Manual (Page 86)

CHAPTER 4 PORT FUNCTIONS
86
User’s Manual U15331EJ4V1UD
4.2.5 Port 5
This is a 4-bit N-ch open-drain I/O port with an output latch. Port 5 can be specified in the input or output mode in
1-bit units by using port mode register 5 (PM5). For a mask ROM version, use of an on-chip pull-up resistor can be
specified by a mask option.
RESET input sets this port to input mode.
Figure 4-11 shows a block diagram of port 5.
Figure 4-11. Block Diagram of P50 to P53
Internal bus
Selector
RD
PM50 to PM53
P50 to P53
N-ch
WR
PORT
Output latch
(P50 to P53)
WR
PM
V DD
Mask option resistor
Mask ROM version only.
For a flash memory version,
a pull-up resistor is not
incorporated.
PM: Port mode register
RD:
Port 5 read signal
WR: Port 5 write signal