NEC PD78F9488 - Manual (Page 51)

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15331EJ4V1UD
51
Figure 3-4. Memory Map ( µPD78F9489)
B F F F H
0 0 0 0 H
0 0 8 0 H
0 0 7 F H
0 0 4 0 H
0 0 3 F H
0 0 3 0 H
0 0 2 F H
F F F F H
F F 0 0 H
F E F F H
F B 0 0 H
F A F F H
0 0 0 0 H
F A 1 C H
F A 1 B H
F A 0 0 H
F 9 F F H
F 7 0 0 H
F 6 F F H
C 0 0 0 H
B F F F H
F 5 0 0 H
F 4 F F H
Program area
Program area
CALLT table area
Vector table area
Special function registers
256 × 8 bits
Internal high-speed RAM
1024 × 8 bits
LCD display RAM
28 × 4 bits
Reserved
Reserved
Internal low-speed RAM
512 × 8 bits
Reserved
Flash memory
49152
× 8 bits Program memory
space
Data memory
space