NEC PD78F9488 - Manual (Page 303)

CHAPTER 16 INTERRUPT FUNCTIONS
User’s Manual U15331EJ4V1UD
303
16.4.2 Maskable interrupt request acknowledgment operation
A maskable interrupt request can be acknowledged when the interrupt request flag is set to 1 and the
corresponding interrupt mask flag is cleared to 0. A vectored interrupt is acknowledged in the interrupt enabled status
(when the IE flag is set to 1).
The time required to start the interrupt servicing after a maskable interrupt request has been generated is shown in
Table 16-4.
Refer to Figures 16-14 and 16-15 for the timing of interrupt request acknowledgement.
Table 16-4. Time from Generation of Maskable Interrupt Request to Servicing
Minimum Time Maximum Time Note
9 clocks 19 clocks
Note The wait time is maximum when an interrupt request is generated immediately before
the BT or BF instruction.
Remark 1 clock: (f
CPU
: CPU clock)
When two or more maskable interrupt requests are generated at the same time, they are acknowledged starting
from the one assigned the highest priority by the priority specification flag.
A pending interrupt is acknowledged when the status in which it can be acknowledged is set.
Figure 16-13 shows the algorithm of interrupt request acknowledgment.
When a maskable interrupt request is acknowledged, the PSW and PC are saved to the stack in that order, the IE
flag is reset to 0, the data in the vector table determined for each interrupt request is loaded to the PC, and execution
branches.
To return from interrupt servicing, use the RETI instruction.
Figure 16-13. Interrupt Request Acknowledgment Program Algorithm
Start
xxIFx = 1 ?
xxMKx = 0 ?
IE = 1 ?
Vectored interrupt
servicing
Yes (Interrupt request generated)
Yes
Yes
No
No
No
Interrupt request pending
Interrupt request pending
xxIFx: Interrupt request flag
xxMKx: Interrupt mask flag
IE:
Flag to control maskable interrupt request acknowledgment (1 = enable, 0 = disable)
1
f
CPU