NEC PD78F9488 - Manual (Page 19)

User’s Manual U15331EJ4V1UD
19
LIST OF FIGURES (3/6)
Figure No. Title Page
7-21 Timing of Square-Wave Output with 16-Bit Resolution ..............................................................................149
7-22 Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M > N))........................................151
7-23 Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M < N))........................................152
7-24 Timing of Carrier Generator Operation (When CR60 = CRH60 = N) .........................................................153
7-25 Operation Timing in PWM Output Mode (When Rising Edge Is Selected).................................................154
7-26 Operation Timing When Overwriting CR50 (When Rising Edge Is Selected).............................................155
7-27 Operation Timing in PWM Output Mode (When Both Edges Are Selected)...............................................156
7-28 Operation Timing in PWM Output Mode (When Both Edges Are Selected)
(When CR50 Is Overwritten) ......................................................................................................................157
7-29 PPG Output Mode Timing (Basic Operation) .............................................................................................159
7-30 PPG Output Mode Timing (When CR6m and CRH6m Are Overwritten)....................................................159
7-31 Case in Which Error of 1.5 Clocks (Max.) Occurs ......................................................................................160
7-32 Timing of Operation as External Event Counter (8-Bit Resolution) ............................................................160
8-1
Block Diagram of Watch Timer ..................................................................................................................161
8-2 Format of Watch Timer Mode Control Register..........................................................................................163
8-3 Format of Watch Timer Interrupt Time Selection Register .........................................................................164
8-4 Watch Timer/Interval Timer Operation Timing ...........................................................................................166
9-1
Block Diagram of Watchdog Timer.............................................................................................................168
9-2 Format of Watchdog Timer Clock Selection Register.................................................................................169
9-3 Format of Watchdog Timer Mode Register ................................................................................................170
10-1
Block Diagram of 10-Bit A/D Converter......................................................................................................174
10-2 Format of A/D Converter Mode Register 0.................................................................................................176
10-3 Format of Analog Input Channel Specification Register 0..........................................................................177
10-4 Basic Operation of 10-Bit A/D Converter....................................................................................................179
10-5 Relationship Between Analog Input Voltage and A/D Conversion Result ..................................................180
10-6 Software-Started A/D Conversion ..............................................................................................................181
10-7 How to Reduce Current Consumption in Standby Mode ............................................................................182
10-8 Conversion Result Read Timing (if Conversion Result Is Undefined) ........................................................183
10-9 Conversion Result Read Timing (if Conversion Result Is Normal) .............................................................183
10-10 Analog Input Pin Handling..........................................................................................................................184
10-11 A/D Conversion End Interrupt Request Generation Timing........................................................................185
10-12 AV
DD
Pin Handling......................................................................................................................................185
11-1
Block Diagram of Serial Interface 20..........................................................................................................187
11-2 Bock Diagram of Baud Rate Generator 20.................................................................................................188
11-3 Format of Serial Operation Mode Register 20............................................................................................190