NEC PD78F9488 - Manual (Page 62)

CHAPTER 3 CPU ARCHITECTURE
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User’s Manual U15331EJ4V1UD
3.2.3 Special function registers (SFRs)
Unlike a general-purpose register, each special function register has a special function.
The special function registers are allocated in the 256-byte area of FF00H to FFFFH.
Special function registers can be manipulated, like general-purpose registers, by operation, transfer, and bit
manipulation instructions. The manipulatable bit units (1, 8, and 16) differ depending on the special function register
type.
The manipulatable bits can be specified as follows.
• 1-bit manipulation
Describe the symbol reserved by the assembler for the 1-bit manipulation instruction operand (sfr.bit). This
manipulation can also be specified with an address.
• 8-bit manipulation
Describe the symbol reserved by the assembler for the 8-bit manipulation instruction operand (sfr). This
manipulation can also be specified with an address.
• 16-bit manipulation
Describe the symbol reserved by the assembler for the 16-bit manipulation instruction operand. When
addressing an address, describe an even address.
Table 3-4 lists the special function registers. The meanings of the symbols in this table are as follows.
• Symbol
Indicates the addresses of the implemented special-function registers. The symbols shown in this column are
reserved words in the assembler, and have already been defined as sfr variables by the #pragma sfr directive in
the C compiler. Therefore, these symbols can be used as instruction operands if an assembler or integrated
debugger is used.
• R/W
Indicates whether the special function register in question can be read or written.
R/W: Read/write
R: Read only
W: Write only
• Bit unit for manipulation
Indicates the bit units (1, 8, 16) in which the special function register in question can be manipulated.
• After reset
Indicates the status of the special function register when the RESET signal is input.