NEC PD78F9488 User Manual
Page 210
CHAPTER 11 SERIAL INTERFACE 20
210
User’s Manual U15331EJ4V1UD
(3) Cautions related to UART mode
(a) When bit 7 (TXE20) of asynchronous serial interface mode register 20 (ASIM20) is cleared during
transmission, be sure to set transmit shift register 20 (TXS20) to FFH, then set TXE20 to 1 before
executing the next transmission.
(b) When bit 6 (RXE20) of asynchronous serial interface mode register 20 (ASIM20) is cleared during
reception, receive buffer register 20 (RXB20) and the receive completion interrupt (INTSR20) are as
follows.
Parity
RxD20 pin
RXB20
INTSR20
<3>
<1>
<2>
When RXE20 is set to 0 at the time indicated by <1>, RXB20 holds the previous data and INTSR20 is not
generated.
When RXE20 is set to 0 at the time indicated by <2>, RXB20 renews the data and INTSR20 is not generated.
When RXE20 is set to 0 at the time indicated by <3>, RXB20 renews the data and INTSR20 is generated.