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NEC PD78F9488 User Manual

Page 135

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CHAPTER 7 8-BIT TIMERS 50, 60, AND 61

User’s Manual U15331EJ4V1UD

135

Table 7-3. Interval Time of Timer 50

TCL502 TCL501 TCL500

Minimum Interval Time

Maximum Interval Time

Resolution

0 0 0 1/f

X

(0.2

µ

s) 2

8

/f

X

(51.2

µ

s) 1/f

X

(0.2

µ

s)

0 0 1 2

3

/f

X

(1.6

µ

s) 2

11

/f

X

(409.6

µ

s) 2

3

/f

X

(1.6

µ

s)

0 1 0 2

7

/f

X

(25.6

µ

s) 2

15

/f

X

(6.55 ms)

2

7

/f

X

(25.6

µ

s)

0 1 1 1/f

XT

(30.5

µ

s) 2

8

/f

XT

(7.81 ms)

1/f

XT

(30.5

µ

s)

1

0

0

Input cycle of timer 60 match
signal

Input cycle of timer 60 match
signal

× 2

8

Input cycle of timer 60 match
signal

1

0

1

Input cycle of timer 60 output

Input cycle of timer 60 output
× 2

8

Input cycle of timer 60
output

Remarks 1. f

X

: Main system clock oscillation frequency

2.

f

XT

: Subsystem clock oscillation frequency

3. The parenthesized values apply to operation at f

X

= 5.0 MHz or f

XT

= 32.768 kHz.

Table 7-4. Interval Time of Timer 60

TCL602 TCL601 TCL600

Minimum Interval Time

Maximum Interval Time

Resolution

0 0 0 1/f

X

(0.2

µ

s) 2

8

/f

X

(51.2

µ

s) 1/f

X

(0.2

µ

s)

0 0 1 2

2

/f

X

(0.8

µ

s) 2

10

/f

X

(204

µ

s) 2

2

/f

X

(0.8

µ

s)

0 1 0 f

TMI

input cycle

f

TMI

input cycle

× 2

8

f

TMI

input cycle

0 1 1 f

TMI

/2 input cycle

f

TMI

/2 input cycle

× 2

8

f

TMI

/2 input cycle

1 0 0 f

TMI

/2

2

input cycle

f

TMI

/2

2

input cycle

× 2

8

f

TMI

/2

2

input cycle

1 0 1 f

TMI

/2

3

input cycle

f

TMI

/2

3

input cycle

× 2

8

f

TMI

/2

3

input cycle

Remarks 1. f

X

: Main system clock oscillation frequency

2. f

TMI

: External input clock frequency

3. The parenthesized values apply to operation at f

X

= 5.0 MHz.

Table 7-5. Interval Time of Timer 61

TCL612 TCL611 TCL610

Minimum Interval Time

Maximum Interval Time

Resolution

0 0 0 1/f

X

(0.2

µ

s) 2

8

/f

X

(51.2

µ

s) 1/f

X

(0.2

µ

s)

0 0 1 2

4

/f

X

(3.2

µ

s) 2

12

/f

X

(819

µ

s) 2

4

/f

X

(3.2

µ

s)

0 1 0 f

TMI

input cycle

f

TMI

input cycle

× 2

8

f

TMI

input cycle

0 1 1 f

TMI

/2 input cycle

f

TMI

/2 input cycle

× 2

8

f

TMI

/2 input cycle

1 0 0 f

TMI

/2

2

input cycle

f

TMI

/2

2

input cycle

× 2

8

f

TMI

/2

2

input cycle

1 0 1 f

TMI

/2

3

input cycle

f

TMI

/2

3

input cycle

× 2

8

f

TMI

/2

3

input cycle

Remarks 1. f

X

: Main system clock oscillation frequency

2. f

TMI

: External input clock frequency

3. The parenthesized values apply to operation at f

X

= 5.0 MHz.

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