NEC PD78F9488 - Manual (Page 57)

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15331EJ4V1UD
57
Figure 3-8. Data Memory Addressing ( µPD78F9489)
Direct addressing
Register indirect addressing
Based addressing
SFR addressing
Short direct addressing
F F F F H
C 0 0 0 H
B F F F H
0 0 0 0 H
F F 0 0 H
F E F F H
F F 2 0 H
F F 1 F H
F E 2 0 H
F E 1 F H
F B 0 0 H
F A F F H
F A 1 C H
F A 1 B H
F 7 0 0 H
F 6 F F H
F A 0 0 H
F 9 F F H
F 5 0 0 H
F 4 F F H
Special function registers
256 × 8 bits
Internal high-speed RAM
1024 × 8 bits
LCD display RAM
28 × 4 bits
Internal low-speed
512 × 8 bits
Reserved
Reserved
Reserved
Flash memory
49152
× 8 bits