Altera DDR SDRAM Controller - Manual (Page 22)

2–12 Chapter 2: Getting Started
MegaWizard Plug-In Manager Design Flow
DDR and DDR2 SDRAM Controller Compiler User Guide © March 2009 Altera Corporation
1 Select Unbuffered memory if you are using unbuffered modules or
devices.
f For more information on memory parameters, refer to “Memory” on
page 3–32 .
5. Click the Controller tab.
f For more information on controller parameters, refer to “Controller ” on
page 3–33 .
6. Select Native or Avalon Memory-Mapped local interface. The Avalon-MM
interface allows you to easily connect to other Avalon-MM peripherals.
f For more information on the Avalon-MM interface, refer to the Avalon
Interface Specifications .
7. Turn on the relevant clocking options.
8. Select your memory initialization options.
9. Select your memory controller options.
10. Turn on the relevant DLL reference clock options.
11. Click the Controller Timings tab.
f For more information on controller timings, refer to “Controller Timings”
on page 3–37 .
12. Enter your memory timing parameters in the Required column, so that the
controller timings meet the requirements specified on your memory’s datasheet.
The wizard picks the appropriate number of clock cycles between commands that
are needed and calculates the resulting delay in the Actual column.
1
To manually enter the number of clock cycles, turn on Manually choose
clock cycles
and enter values in the Cycles column.
13. Click Memory Timings tab.
f
For more information on memory timings, refer to “Memory Timings” on page 3–38 .
14. If you chose Custom memory device, enter the device settings from your chosen
memory’s datasheet, otherwise your chosen memory type device settings are
entered automatically.
15. Click the Board Timings tab.
f For more information on board timings, refer to “Board Timings” on page 3–39 .
16. Turn on Manual pin load control, if you want to enter the pin loading for the
FPGA pins.