Rainbow Electronics DS31256 User Manual
Page 81
DS31256
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Bits 0 to 9/Block ID (BLKID0 to BLKID9)
00000000000 (000h) = block number 0
01111111111 (1FFh) = block number 511
1111111111 (3FFh) = block number 1023
Bit 14/Indirect Access Read/Write (IARW). When the host wishes to read data from the internal transmit block
pointer RAM, this bit should be written to 1 by the host. This causes the device to begin obtaining the data from
the block location indicated by the BLKID bits. During the read access, the IAB bit is set to 1. Once the data is
ready to be read from the TFBP register, the IAB bit is set to 0. When the host wishes to write data to the internal
transmit block pointer RAM, this bit should be written to 0 by the host. This causes the device to take the data that
is currently present in the TFBP register and write it to the channel location indicated by the BLKID bits. When
the device has completed the write, the IAB is set to 0.
Bit 15/Indirect Access Busy (IAB). When an indirect read or write access is in progress, this read-only bit is set
to 1. During a read operation, this bit is set to 1 until the data is ready to be read. It is set to 0 when the data is
ready to be read. During a write operation, this bit is set to 1 while the write is taking place. It is set to 0 once the
write operation has completed.
Register Name:
TFBP
Register Description: Transmit FIFO Block Pointer
Register Address:
0994h
Bit
# 7 6 5 4 3 2 1 0
Name TBP7 TBP6 TBP5 TBP4 TBP3 TBP2 TBP1 TBP0
Default
Bit
# 15 14 13 12 11 10 9 8
Name n/a n/a
n/a
n/a
n/a
n/a
TBP9
TBP8
Default
Note: Bits that are underlined are read-only; all other bits are read-write
.
Bits 0 to 9/Block Pointer (TBP0 to TBP9). These bits indicate which of the 1024 blocks is the next block in the
link list chain. A block is not allowed to point to itself.
0000000000 (000h) = block 0 is the next linked block
0111111111 (1FFh) = block 511 is the next linked block
1111111111 (3FFh) = block 1023 is the next linked block
Register Name:
TFLWMIS
Register Description: Transmit FIFO Low-Watermark Indirect Select
Register Address:
09A0h
Bit
# 7 6 5 4 3 2 1 0
Name HCID7
HCID6
HCID5 HCID4 HCID3 HCID2 HCID1 HCID0
Default
0 0 0 0 0 0 0 0
Bit
# 15 14 13 12 11 10 9 8
Name IAB IARW n/a
n/a
n/a
n/a
n/a
n/a
Default
0 0 0 0 0 0 0 0
Note: Bits that are underlined are read-only, all other bits are read-write.
Bits 0 to 7/HDLC Channel ID (HCID0 to HCID7)
00000000 (00h) = HDLC channel number 1
11111111 (FFh) = HDLC channel number 256