Rainbow Electronics DS31256 - Manual (Page 110)

DS31256
110 of 181
Figure 9-12. Transmit DMA Packet Handling
Buffer 1
Packet 1
1st Descriptor
(EOF=0/CV=0)
Buffer 2
Packet 1
2nd Descriptor
(EOF=0/CV=0)
Buffer 3
Packet 1
Last Descriptor
(EOF=1/CV=1)
Buffer 1
Packet 2
Last Descriptor
(EOF=1/CV=0)
Buffer 1
Packet 3
1st Descriptor
(EOF=0/CV=0)
Buffer 2
Packet 3
2nd Descriptor
(EOF=0/CV=0)
Buffer 3
Packet 3
Last Descriptor
(EOF=1/CV=1)
Buffer 1
Packet 4
Last Descriptor
(EOF=1/CV=0)
Buffer 1
Packet 5
Last Descriptor
(EOF=1/CV=0)
Buffer 1
Packet 6
1st Descriptor
(EOF=0/CV=0)
Buffer 2
Packet 6
2nd Descriptor
(EOF=0/CV=0)
Buffer 3
Packet 6
Last Descriptor
(EOF=1/CV=0)
PV=1 PV=1
Next Pending
Descriptor Pointer
stored within the
Packet Descriptor
Last Pending Descriptor Pointer
Next Pending Descriptor Pointer
Next Descriptor Pointer
Start Descriptor Pointer
Next Pending
Descriptor Pointer
stored within the
Packet Descriptor
Transmit DMA Configuration RAM
Packet Chain
Column 1 Packet Chain
Column 2 Packet Chain
Column 3 Packet Chain
Column 4