Rainbow Electronics DS31256 - Manual (Page 146)

DS31256
146 of 181
Register Name: PLBM
Register Description: PCI Local Bus Memory Base Address Register
Register Address:
0x110h
LSB
Base Address (Read Only/Set to 0h) PF TYPE1 TYPE0 MSI
Base Address Base Address (Read Only/Set to 0h)
Base Address
MSB
Base Address
Note: Read-only bits in the PLBM register are underlined; all other bits are read-write.
Bit 0/Memory Space Indicator (MSI). This read-only bit is forced to 0 to indicate that the local bus is mapped to
memory space.
Bits 1 and 2/Type 0 and Type 1. These read-only bits are forced to 00b to indicate that the local bus can be
mapped anywhere in the 32 bit address space.
Bit 3/Prefetchable (PF). This read-only bit is forced to 0 to indicate that prefetching is not supported by the
device for the local bus.
Bits 4 to 11/Base Address. These read-only bits are forced to 0 to indicate that the local bus requires 1MB of
memory space.
Bits 12 to 31/Base Address. These read/write bits define the location of the 1MB memory space that is mapped to
the local bus. These bits correspond to the most significant bits of the PCI address space.
Register Name:
PINTL1
Register Description: PCI Interrupt Line and Pin/Minimum Grant/Maximum Latency Register 1
Register Address:
0x13Ch
LSB
Interrupt Line
Interrupt Pin (Read Only/Set to 01h)
Maximum Grant (Read Only/Set to 00h)
MSB
Maximum Latency (Read Only/Set to 00h)
Bits 0 to 7/Interrupt Line. These read/write bits indicate and store interrupt line routing information. The device
does not use this information, it is only posted here for the host to use.
Bits 8 to 15/Interrupt Pin. These read-only bits are forced to 01h to indicate that the uses PINTA as an interrupt.
Bits 16 to 23/Minimum Grant. These read-only bits are forced to 0.
Bits 24 to 31/Maximum Latency. These read-only bits are forced to 0.