Rainbow Electronics DS31256 - Manual (Page 154)

DS31256
154 of 181
Bit 6/Local Bus Width (LBW)
0 = 16 bits
1 = 8 bits
Bits 8 to 11/Local Bus Arbitration Timer Setting (LAT0 to LAT3). These four bits determine the total time the
local bus seizes the bus when it has been granted in the arbitration mode (LARBE = 1). This period is measured
from LHLDA (LBG) being detected to LBGACK inactive.
CONDITION 33MHz PCLK 25MHz PCLK
0000 = when granted, hold the bus for 32 LCLKs 0.97 ms 1.3ms
0001 = when granted, hold the bus for 64 LCLKs 1.9 ms 2.6ms
0010 = when granted, hold the bus for 128 LCLKs 3.9 ms 5.1ms
0011 = when granted, hold the bus for 256 LCLKs 7.8 ms 10.2ms
0100 = when granted, hold the bus for 512 LCLKs 15.5 ms 20.5ms
1101 = when granted, hold the bus for 262,144 LCLKs 7.9ms 10.5ms
1110 = when granted, hold the bus for 524,288 LCLKs 15.9ms 21.0ms
1111 = when granted, hold the bus for 1,048,576 LCLKs 31.8ms 41.9ms