Rainbow Electronics DS31256 User Manual

Page 47

DS31256

47 of 181

Figure 6-2. Port Timing (Channelized and Unchannelized Applications)

RC[n] / TC[n]
Normal Mode

RD[n]
TD[n]

RS[n] / TS[n]
0 Clock Early &
Not Inverted

RS[n] / TS[n]
1/2 Clock Early &
Inverted

RS[n] / TS[n]
1 Clock Early &
Not Inverted

RS[n] / TS[n]
2 Clocks Early &
Not Inverted

Bit 0

Bit 192 or 255
or 511 or 1023

Bit 1

Bit 191 or 254
or 510 or 1022

First Bit of
the Frame

Last Bit of
the Frame

RC[n] / TC[n]
Inverted Mode

tdm_tim