Avago Technologies LSI53C1010 - Manual (Page 95)

Instruction Descriptions 3-55
Example RESELECT host_1, rsel_addr
RESELECT FROM entry_2, REL rsel_addr
Field(s) This command has the following fields:
Register
Definition(s) The information listed below describes the DBC and DSPS registers.
REL Indicates indirect addressing.
Address A 32-bit address that represents the address of the next
instruction being fetched when the chip is selected or
reselected.
Figure 3.15 RESELECT Format
31 30 29 27 26 25 24 23 20 19 16 15 0
DCMD Register DBC Register
Instr
Type
Opcode Relative Table Indirect R R SCSI ID R
0 1 0 0 0 0 0 0 0 0 0 0 x x x x 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 0
DSPS Register
Alt Address
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
Instruction
Type I/O.
Opcode Reselect instruction.
Relative
Mode Indicates that the 24-bit address is an offset from the current
program counter.
Table Indirect
Mode The SCSI ID, synchronous, and wide parameters should be
loaded offset from the Data Structure Address.
SCSI ID Identifies the SCSI initiator to be reselected. This 4-bit field
specifics the encoded destination ID. This file is part of the
address if the table indirect mode is used.
Alternate
Address Specifies the memory address to fetch the next instruction if
the SCRIPTS processor is selected or reselected.