Avago Technologies LSI53C1010 - Manual (Page 19)

Contents xix
2.4 Arithmetic Operators 2-7
2.5 Bitwise Operators 2-7
2.6 Big and Little Endian Byte Addressing 2-8
3.1 Opcode Bit Options 3-2
3.2 Read/Write Instructions 3-3
3.3 SCRIPTS Instructions Set 3-4
3.4 SCSI Phase Bit Values (CALL Format) 3-7
3.5 SCSI Phase Bit Values (CHMOV Format) 3-12
3.6 SCSI Phase Bit Values (INT Format) 3-18
3.7 SCSI Phase Bit Values (INTFLY Format) 3-23
3.8 SCSI Phase Bit Values (JUMP Format) 3-29
3.9 SCSI Phase Bit Values (JUMP 64 Format) 3-35
3.10 Register Address Field Definitions (LOAD Format) 3-39
3.11 LOAD64 Format 3-41
3.12 Register Address Field Definitions (LOAD64 Format) 3-42
3.13 SCSI Phase Bit Values (MOVE Format) 3-44
3.14 SCSI Phase Bit Values (RETURN Format) 3-59
3.15 Low Order Bit Options 3-68
4.1 Keywords 4-7
5.1 Relationship Between Entry and PROC Statements
and Output File
5-5
6.1 SCSI Registers 6-2
6.2 DMA Registers 6-5
6.3 SCRIPTS Registers 6-6
6.4 64-Bit Selector Registers 6-6
6.5 Interrupt Registers 6-7
6.6 Phase Mismatch Registers 6-9
6.7 Test and Miscellaneous Registers 6-10
6.8 General Purpose Registers 6-11
6.9 LSI53C815/810A/860 Startup Bits 6-12
6.10 LSI53C825A/875/876/885/895/895A/896/10XX
Startup Bits
6-14
8.1 Data Structure 8-9
8.2 I/O Data Structure 8-9
11.1 SCSI Protocol and Target SCRIPTS Instructions 11-2
11.2 Register Bits Used for Target Operation 11-3
13.1 ISTAT1 Register 13-2
13.2 Index Mapping 13-8