Avago Technologies LSI53C1010 User Manual
Page 299
B-5
; This will set up the clock dividers as defined in the
SCNTL3 register
MOVE FROM identify_msg_buf, WHEN MSG_IN
CLEAR ACK
JUMP REL(to_decisions)
id_1:
MOVE MEMORY 4, PATCH_addr_of_table1_ptr,
PATCH_chip_physaddr+DSA
;initialize SXFER for synchronous transfers from table
MOVE MEMORY 1,
PATCH_addr_of_table1+2,PATCH_chip_physaddr+SXFER
MOVE MEMORY
1,PATCH_addr_of_table1,PATCH_chip_physaddr+SCNTL3
; This will set up the clock dividers as defined in the
SCNTL3 register
MOVE FROM identify_msg_buf, WHEN MSG_IN
CLEAR ACK
JUMP REL(to_decisions)
id_2:
MOVE MEMORY 4, PATCH_addr_of_table2_ptr,
PATCH_chip_physaddr+DSA
;initialize SXFER for synchronous transfers from table
MOVE MEMORY
1,PATCH_addr_of_table2+2,PATCH_chip_physaddr+SXFER
MOVE MEMORY
1,PATCH_addr_of_table2,PATCH_chip_physaddr+SCNTL3
; This will set up the clock dividers as defined in the
SCNTL3 register
MOVE FROM identify_msg_buf, WHEN MSG_IN
CLEAR ACK
JUMP REL(to_decisions)
CPU_set_SIGP:
JUMP scheduler