Avago Technologies LSI53C1010 - Manual (Page 52)

3-12 The SCSI SCRIPTS Processor Instruction Set
Field(s) This command has the following fields:
The values in Table 3.5 define the SCSI information transfer phase. The
LSI53C10XX chips, with dual transition timing capabilities define two
transfer phases, ST for single transition timing, and DT for dual transition
timing.
Instruction
Type Block Move.
Indirect Indirect Addressing Mode.
0 - Use destination field as an address
1 - Use destination field as an address to an address
Table Indirect Table Indirect Addressing Mode.
0 - Use Absolute addressing mode
1 - Use destination address as offset from the value of Data
Structure Address (DSA) register
Opcode Defines whether the instruction will be executed as a Block
Move or a Chained Block Move. This bit has different
meanings, depending on whether the chip is operating in the
target or initiator mode.
Target Initiator
MOVE Opcode = 0 Opcode = 1
CHMOV Opcode = 1 Opcode = 0
Table 3.5 SCSI Phase Bit Values (CHMOV Format)
1
Phase Message Command/Data Input/Output
DATA_OUT
2
(ST_DATA_OUT)
3
0 0 0
DATA_IN
2
(ST_DATA_IN)
3
0 0 1
COMMAND 0 1 0
STATUS 0 1 1
R4
4
(DT_DATA_OUT)
3
1 0 0