Altera Avalon Verification IP Suite - Manual (Page 79)

set_enable_a_burst_legal()
set_enable_a_burst_legal()
Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables an assertion that ensures that the total number of assertions for the
write and readdatavalid is the same as the burstcount for any burst
transfer. Disabled when burst transfers are not supported.
Description:
Verilog HDL Language support:
set_enable_a_byteenable_legal()
set_enable_a_byteenable_legal() Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables an assertion that ensures the byteenable value is legal value.
Disabled when
byteenable
is not supported.
For more information about legal byte enables, refer to the Avalon Interface
Specifications.
Description:
Verilog HDL Language support:
Related Information
Avalon Interface Specifications
set_enable_a_constant_during_burst()
set_enable_a_constant_during_burst() Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables an assertion ensuring
address
,
burstcount,
and
byteenable
are
held constant in a write burst transfer. Disabled when
waitrequest
is not
supported. Disabled when burst transfers are not supported.
Description:
Verilog HDL Language support:
Altera Corporation Avalon-MM Monitor
Send Feedback
7-7 set_enable_a_burst_legal()