Altera Avalon Verification IP Suite - Manual (Page 151)

event_transaction_fifo_overflow()
event_transaction_fifo_overflow() Prototype:
Verilog HDL: N.A.
VHDL: bfm_id
Arguments:
void
Returns:
Notifies the testbench that the transaction FIFO is full and transactions will
be dropped. Description:
VHDL Language support:
get_transaction_channel()
get_transaction_channel()
Prototype:
Verilog HDL: None
VHDL: transaction_channel , bfm_id , req_if(bfm_id)
Arguments:
STChannel_t
. Returns:
Returns the channel identifier for the most recently removed transaction. Description:
Verilog HDL, VHDL Language support:
get_transaction_data()
get_transaction_data()
Prototype:
Verilog HDL: None
VHDL: transaction_data , bfm_id , req_if(bfm_id)
Arguments:
STData_t
. Returns:
Returns the data in the most recently removed transaction. Description:
Verilog HDL, VHDL Language support:
get_transaction_empty()
get_transaction_empty()
Prototype:
Verilog HDL: None
VHDL: transaction_empty , bfm_id , req_if(bfm_id)
Arguments:
STEmpty_t
. Returns:
Returns the number of empty symbols in the most recently removed
transaction. Description:
Verilog HDL, VHDL Language support:
Altera Corporation Avalon-ST Monitor
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10-15 event_transaction_fifo_overflow()